1. Field of the Invention
This invention relates to a process for suppressing parasitic components, in particular parasitic diodes and transistors, in integrated circuits which possess, in particular, inversely operated transistors, and more particularly to such a process in which a highly doped zone is introduced into a semiconductor substrate of a first conductivity type, the highly doped zone being of an opposite, second conductivity type and extending to a surface of the semiconductor substrate, and in which a semiconductor layer of the second conductivity type is epitaxially deposited on the surface and further zones of different conductivity types are produced in the semiconductor layer to form at least one component which is electrically insulated from adjacent components.
2. Description of the Prior Art
In integrated circuits, parasitic diodes and transistors exert a considerable influence over the switching performance of the circuits. This applies, in particular, to the so-called "MTL-or I.sup.2 L circuits" (merged-transistor-logic and integrated-injection-logic), in which transistors are inversely operated. In an inversely operated transistor, in contrast to a transistor of the conventional planar technique, the emitter zone is not located on the surface of the semiconductor body, or in an epitaxial layer deposited on a semiconductor substrate, but in the semiconductor body itself, i.e. beneath the epitaxially deposited layer.